What is Error Permissive Computing?

We (AIST) are exploring a new concept of Error Permissive Computing that improve the capability and capacity while drastically reducing power consumption. More specifically, we controllably allow hardware errors and develop system software to assure acceptable computational results. For example, an error correction technique can result in increased latency and reduced capacity. By taking a holistic approach across the layers from hardware to software, lightweight and appropriate error correction is performed at the software layer while eliminating general purpose error correction in hardware layer.

We are hiring a postdoc researcher to work with us. See Call for Postdoc Application. Feel free to contact us.

Members

• AIST-Tokyo Tech Real World Big Data Computation Open Innovation Laboratory

• National Institute of Advanced Industrial Science and Technology (AIST)

• Ryousei Takano
• Takahiro Hirofuchi
• Mohamed Wahib
• Truong Thao Nguyen
• Hiroki Kanezashi
• Akram Ben Ahmed

Research

Now ongoing!

Publication

1. R. Takano, T. Hirofuchi, M. Wahib, T. Nguyen, H. Kanezashi, A. Ahmed, “Error Permissive Computing: a New Approach for Post Moore’s Computer System Design,” 2nd R-CCS International Symposium, February 2020. Poster

Contact

E-mail: epc-contact@aist.go.jp

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